Christos Sakalis.
Ghost Loads: Side-Effect Free Speculative Memory Accesses |
Mayank Parasar and Tushar Krishna.
Guaranteeing Deadlock Freedom in Arbitrary Network Topologies using Packet Swaps |
Chao Zhang, Yuan Zeng and Xiaochen Guo.
A Fine-Grained Cache with Adaptive Merged Block |
Gururaj Saileshwar and Moinuddin Qureshi.
Probabilistic Integrity for Low-Overhead Secure Memories |
Tomoki Tajimi, Yuki Futamase, Masaki Hayashi, Ryota Shioya, Masahiro Goshima and Tomoaki Tsumura.
Speculatively Granting Conflicting Accesses on Hardware Transactional Memory |
Sara Metwalli and Yuko Hara-Azumi.
SEA-AC: Symbolic Execution-based Analysis towards Approximate Computing |
Ricardo Alves, Alberto Ros, Stefanos Kaxiras and David Black-Schaffer.
Investigating the Use of the Store-Buffer as a Filter-Cache |
Cecil Accetti, Eshton Robateau and Peilin Liu.
Tackling Computer Security Issues Through Lazy, Stackless Functional Programming Architectures |
Katie Lim and David Wentzlaff.
Building a Heterogeneous ISA Research Platform Using the OpenPiton Framework |
Reoma Matsuo, Ryota Shioya and Hideki Ando.
Improving Instruction Fetch Throughput with Dynamic Control of Pipeline Structure |
Mehdi Alipour, Rakesh Kumar, Stefanos Kaxiras and David Black-Schaffer.
Minimum Out-of-Order Core |
Behzad Salami, Osman Unsal and Adrian Cristal.
UnderVolt_FNN: An Energy-Efficient and Fault-Resilient Low-Voltage FPGA-based DNN Accelerator |
Pranav Gokhale, Jonathan Baker and Frederic Chong.
Improved Quantum Circuits with Qudits and Dirty Ancillae |
Sohan Lal and Ben Juurlink.
A Case for Memory Access Granularity Aware Selective Lossy Compression for GPUs |
Adi Fuchs and David Wentzlaff.
The Interplay of Transistors and Accelerators |
Kyosuke Tanaka, Hayato Yamaki, Shinobu Miwa and Hiroki Honda.
Optimizing Memory Hierarchy within an Internet Router for High-Throughput and Energy-Efficient Packet Processing |
Mohamed Ibrahim, Hongyuan Liu, Onur Kayiran and Adwait Jog.
Design and Analysis of Efficient Inter-core Communication in GPUs |
Weizhe Hua, Christopher De Sa, Zhiru Zhang and G. Edward Suh.
Accelerating Neural Networks using Channel Gating |
Tatsuya Hoshino and Koji Inoue.
Time-Domain Neural Network with Superconducting Single-Flux-Quantum Devices |
Bojian Zheng and Gennady Pekhimenko.
EcoRNN: Efficient Computing of LSTM RNN on GPUs |
Hiroki Yamane, Daiki Yamakawa, Yasuhiko Nakashima, Hiroya Ikeda and Mutsumi Kimura.
Development and Evaluation of Letter Reproduction System using Cellular Neural Network and Oxide Semiconductor Synapses |
Hyoukjun Kwon and Tushar Krishna.
MAESTRO: An Open-source Infrastructure for the Cost-Benefit Analysis of Dataflows within Deep Learning Accelerators |
Koki Ishida, Masamitsu Tanaka, Takatsugu Ono and Koji Inoue.
Prototype Design of 30 GHz Superconducting Single-Flux-Quantum Microprocessor Towards Cryogenic General Purpose Computing |
Ushio Jimbo, Ryota Shioya and Masahiro Goshima.
Clocking Scheme That Realizes Ballistic Signal Flow |
Yu-Shun Hsiao, Yun-Chen Lo and Ren-Shuo Liu.
FlexNet: Neural Networks with Inherent Inference-Time Bitwidth Flexibility |
David Schlais, Heng Zhuo and Mikko Lipasti.
Configurable Tightly-Coupled FPGA-style fabric for Fine-Grained Acceleration |
