Program

Workshop and Tutorials

Saturday (Oct. 20) Sunday (Oct. 21)
Room Morning (8:30AM-noon) Afternoon (1pm-5pm) Morning (8:30AM-noon) Afternoon (1pm-5pm)
Savoy I ROCm+MIOpen Intermittent
Computing
Quantum
Computing
Savoy II RISC-V PHOTONICS
Red Rose NoCArc Women and Minorities
Drawing GenSim Labeled RISC-V Domain Specific
System
Architecture
Energy Efficient
Computing

Workshops

Name   Full Name Organizers Affiliation
RISC-V   RISC-V Day Workshop Shumpei Kawasaki, Krste Asanovic SH Consulting KK., UC Berkeley
PHOTONICS   PHOTONICS: Photonics-Optics Technology Oriented Networking, Information, and Computing Systems Jiang Xu, Yuichi Nakamura, Yi-Shing Chang Hong Kong University of Science and Technology, NEC, Intel
NoCArc   Network-on-Chip Architectures Masoumeh (Azin) Ebrahimi, Kun-Chih (Jimmy) Chen, Midia Reshadi KTH Royal Institute of Technology, Sweden, National Sun Yat-sen University, Taiwan, Science and Research Branch of Islamic Azad University
Women and Minorities   Career Workshop for Women and Minorities in Computer Architecture Valentina Salapura, Zehra Sura, Alan Bivens IBM
Domain Specific System Architecture   First Annual Workshop on Domain Specific System Architecture Hyesoon Kim, Giho Park Georgia Tech, Sejong University

Tutorials

Name   Full Name Organizers Affiliation
ROCm+MIOpen   AMD Radeon Open Compute and Machine Intelligence: Hardware and Software Joseph Greathouse, Gabriel Loh AMD
Intermittent Computing   Getting Started with Intermittent Computing Brandon Lucia, Emily Ruppel, Kiwan Maeng, Graham Gobieski, Milijana Surbatovich CMU
Quantum Computing   Introduction to Grand Challenges and Research Tools for Quantum Computing Fred Chong, Margaret Martonosi, Ali Javadi-Abhari UChicago, Princeton, IBM
GenSim   GenSim: A Toolset for Efficient Binary Translation Harry Wagstaff, Bruno Bodin, Tom Spink, Björn Franke University of Edinburgh
Labeled RISC-V   Labeled RISC-V: A Case for Software-Defined Architecture Yungang Bao ICT, CAS
Energy Efficient Computing   Energy Efficient Computing in Multicore CPUs: Design Margins and Variability Dimitris Gizopoulos, George Papadimitriou, Athanasios Chatzidimitriou University of Athens