Intel-NSF panel

Oct. 21 5:10pm - 5:55pm room: Savoy I

The Foundational Microarchitecture (FoMR) program jointly funded by NSF and Intel is aimed at conducting transformative research to improve CPU performance measured in Instructions Per Cycle (IPC). The funding for the first round has commenced while the call for submission of proposals for the second round of funding has gone out (URL: ).

This panel consisting of representatives from Intel and NSF and prominent architecture researchers is aimed at discussing the continued importance of foundational microarchitecture research to the industry and to future of global computing at large. The panelists will discuss their interests and perspectives and seek to broaden and deepen the conversation with the architecture research community around this thrust.