The 50th Annual IEEE/ACM International Symposium on Microarchitecture, 2017

Program

Workshop Dates

Saturday Sunday
Room Morning Afternoon Morning Afternoon
1 Cognitive Workloads NocARC
2 Women and Minorities HW-ML
3 CARRV Cognitive Edge Computing
4 Quantum NOPE Reliability Assessment OpenPiton

Workshops

Name   Full Name Organizers Affiliation
CognitiveWorkloads   Exploiting Accelerator Diversity for Cognitive Workloads Peter Hofstee, Raj Krishnamurthy, Ganessan IBM
NocArc   Workshop on Network on Chip Architectures (NoCArc) Maurizio Palesi U of Catania, Italy
Women and Minorities   Career Workshop for Women and Minorities in Computer Architecture Valentina, Zehra, Alan IBM
CARRV   First Workshop on RISC-V for Computer Architecture Research (CARRV) Silviu, Arun, Arvind BAE, MIT
Cognitive Edge Computing   Cognitive Edge Computing Ravi Iyer, Nilesh Jain, VJ Reddi Intel, Google, UT Austin
NOPE   Workshop On Negative Outcomes, Post-mortems, and Experiences David Brooks Harvard
         

Tutorials

Name   Full Name Organizers Affiliation
Quantum   Tutorial on Quantum Computing Koen Bertels and Carmen G. Almudéver Delft University of Technology, QuTech
HW-ML   Tutorial on Hardware Architectures for Deep Neural Networks Joel Emer, Vivienne Sze, and Yu-Hsin Chen MIT and Nvidia
Reliability Assessment   Tutorial on Microarchitecture Level Reliability Assessment: Throughput and Accuracy Dimitris Gizopoulos, Athanasios Chatzidimitriou, Manolis Kaliorakis, Univ. of Athens
OpenPiton   An Introduction to OpenPiton, a Manycore Open Source Processor David Wentzlaff Princeton