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                       CALL FOR PAPERS: MICRO 2012
  The 45th Annual IEEE/ACM International Symposium on Microarchitecture, 2012

                            December 1 - 5, 2012

                  http://www.microsymposia.org/micro45/
      
            Abstract deadline: June 1, 2012 (11:59pm EDT)
            Paper deadline:    June 8, 2012 (11:59pm EDT)
            Rebuttal period:   Aug 12 - 15, 2012
            Notification:      Sept 1, 2012

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The International Symposium on Microarchitecture (MICRO) is the premier forum
for presentation and discussion of new ideas in microarchitecture, compilers,
hardware/software interfaces, and design of advanced computing and
communication systems. The goal of MICRO is to bring together researchers in
the fields of microarchitecture, compilers, and systems for technical exchange.
The MICRO community has enjoyed having close interaction between academic
researchers and industrial designers -- we aim to continue and strengthen this
longstanding tradition at the 45th MICRO in Vancouver.

We invite original paper submissions related to but not limited to the
following:

* Hardware, software, and hybrid techniques for improving system
  performance, energy-efficiency, cost, complexity, predictability,
  quality of service, reliability, dependability, security,
  scalability, programmer productivity, etc.
* Processor, memory, storage, interconnect designs
* Architectures for instruction-level, thread-level, and memory-level
  parallelism: superscalar, VLIW, data-parallel, multithreaded,
  multicore, manycore, etc.
* Compiler and microarchitectural techniques for parallelism (ILP,
  TLP, MLP)
* Low-power, high-performance, and cost/complexity-efficient
  architectures
* Dynamic optimization, emulation, and object code translation
* Architectures for emerging platforms, including smartphones,
  tablets, cloud/datacenter, etc.
* Architectures and compilers for embedded processors, DSPs, GPUs,
  ASIPs (network processors, multimedia, wireless, etc.)
* Advanced software/hardware speculation and prediction schemes
* Microarchitecture techniques to better support system software,
  programming languages, programmability, and compilation
* Microarchitecture modeling and simulation 
* Insightful experimental and comparative evaluation and analysis of
  existing microarchitectures, hardware/software mechanisms and
  workloads

Submissions should follow the guidelines and formatting rules specified on the
conference website. Papers that violate these guidelines and rules may be
returned to author(s) without review.

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                          ORGANIZING COMMITTEE
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General Chair:
        Stephen Melvin, Consultant

Program Chair:
        Onur Mutlu, Carnegie Mellon University

Program Committee:
        Tor Aamodt, British Columbia
        David Albonesi, Cornell
        Krste Asanovic, Berkeley
        Todd Austin, Michigan
        Rajeev Balasubramonian, Utah
        Richard Belgard, Consultant
        Pradip Bose, IBM
        David Brooks, Harvard
        Douglas Carmean, Intel
        Derek Chiou, UT Austin
        Robert Colwell, DARPA
        Tom Conte, Georgia Tech
        Chita Das, Penn State
        Michel Dubois, USC
        Evelyn Duesterwald, IBM
        Lieven Eeckhout, Ghent University
        Boris Grot, EPFL
        Nikos Hardavellas, Northwestern
        James Hoe, CMU
        Wen-mei Hwu, Illinois
        Engin Ipek, Rochester
        Daniel Jimenez, UT San Antonio
        Hyesoon Kim, Georgia Tech
        Konrad Lai, Intel
        Gabriel Loh, AMD
        Ahmed Louri, NSF and Arizona
        Scott Mahlke, Michigan
        Srilatha Manne, AMD
        Andreas Moshovos, Toronto
        Trevor Mudge, Michigan
        Yale Patt, UT Austin
        Milos Prvulovic, Georgia Tech
        Moinuddin Qureshi, Georgia Tech
        Ronny Ronen, Intel
        Yanos Sazeides, Cyprus
        Michael Schlansker, HP Labs
        Andre Seznec, IRISA/INRIA
        Michael Shebanow, NVIDIA
        Burton Smith, Microsoft
        Jared Smolens, Oracle
        Viji Srinivasan, IBM
        Chris Wilkerson, Intel
        Yuanyuan Zhou, UCSD
        Craig Zilles, Illinois

Tutorials and Workshops Chair:
        Derek Chiou, UT Austin

Finance Chair:
        Tor Aamodt, British Columbia

Web and Submissions Chairs:
        Chris Fallin, Carnegie Mellon University
        Justin Meza, Carnegie Mellon University
        Vivek Seshadri, Carnegie Mellon University

Steering Committee:
        David Albonesi, Cornell
        Richard Belgard, Consultant (Chair)
        Tom Conte, Georgia Tech
        Kemal Ebcioglu, Global Supercomputing
        Paolo Faraboschi, HP Labs
        Wen-mei Hwu, Illinois
        Scott Mahlke, Michigan
        Margaret Martonosi, Princeton
        Bill Mangione-Smith, IP Navigation Group
        Yale Patt, UT Austin
        Milos Prvulovic, Georgia Tech