Open Research Compiler (ORC) 2.0 and Tuning Performance on Itanium

A tutorial held in conjunction with MICRO-35

Istanbul, Turkey

The release of Open Research Compiler (ORC) version 2.0 is planned around the year-end of 2002. ORC ( http://ipf-orc.sourceforge.net/) has been used in many research and teaching projects worldwide since its first release in Jan 2002. Building on top of the solid infrastructure from the previous release, the 2.0 version will include and enable additional optimizations to achieve an outstanding performance level on both Itanium and Itanium 2 processors. They include many interprocedural analysis and optimizations, optimizations for memory hierarchy, and optimizations for Itanium hardware features. This release will mark the major performance milestone for ORC. In this tutorial, we will present the features in ORC 2.0 as well as a brief overview of the whole compiler.

In addition, we will share the various tools and experiences that we have obtained during the process of analyzing performance opportunities to steer up the ORC performance. As part of the original design, ORC will include the compiler support for speculative multi-threading. We will also mention a number of example research activities based on this compiler infrastructure.

Tutorial Organizers:

Roy Ju (MRL, Intel) [email protected]
Sun Chan (MRL, Intel) [email protected]
Chengyong Wu (ICT, CAS) [email protected]
Tin-Fook Ngai (MRL, Intel Labs)
 

Bios:

Roy D.C. Ju is a senior researcher in the Programming System Lab in the Microprocessor Research Labs, Intel Corp. He is currently the compiler architect of an IA-64 open source research compiler, which aims at providing an infrastructure for compiler and architecture research on IA-64 to the research and open source communities. His primary research interests include compiler optimization, optimization for memory hierarchy, software power management, program analysis, computer architecture, and parallel processing. Prior to joining in Intel, he was with the Hewlett-Packard Company from 1994 to 1999, and he was a project lead in designing and developing an optimizing compiler for IA-64. He worked at IBM from 1992 to 1994 in developing a then state-of-the-art Fortran 90 optimizing compiler. He received his B.S. degree in Electrical Engineering from National Taiwan University in 1984. He received his M.S. and Ph.D. degrees in Electrical and Computer Engineering from the University of Texas at Austin in 1988 and 1992, respectively. He currently holds 6 U.S. patents and has published more than 30 journal and conference papers in various areas, including array language optimizations, compilation for instruction-level parallelism, cache optimization, coarse-grained parallelization, etc. He has served on the program committees of a number of conferences, such as MICRO-33 and PLDI 2001.

Sun C. Chan is the manager of the open source research compiler project in the Microprocessor Research Labs, Intel Corp. His primary research interests include large-scale software engineering, compiler scalar optimization, both in the global and inter-procedural areas, and instruction level parallelism. Prior to joining Intel, he was with SGI where he was a manager of global optimizer and interprocedural optimizer. He is also the coordinator and architect of the open source Pro64 compiler. Before SGI, he was a project lead at Mips working on global scheduling and optimization of dynamic shared objects. He received his M.S. degree in Computer Science from Purdue University in 1981. He holds 10 U.S. patents with several more pending and has published in journal and conference papers in various areas, including inter-procedural analysis, global optimization and instruction-level parallelism. He is also interested in engaging university researchers in compiler and architecture research.

Chengyong Wu received the B.S. degree in Mathematics from the Fudan University, Shanghai, P. R. China, in 1991 and the M.S. degree in Computer Engineering from the Beijing University of Aeronautics and Astronautics, Beijing, P. R. China, in 1996 and the Ph.D. degree in Computer Sciences from the Institute of Computing Technology, Beijing, P. R. China, in 2000. Since March 2000, he has been with the Advanced Compiler Technology Lab at the Division of Computer Systems, Institute of Computing Technology, Chinese Academy of Sciences. His research interests include instruction-level-parallelism, optimization, and common compiler infrastructure. He is currently working in a project of developing an IPF open source research compiler.

Tin-Fook Ngai is a senior researcher at the Programming Systems Lab in the Microprocessor Research Labs, Intel Corp. He is currently leading a team doing research work in speculative multithreading compilation. He received his B.Sc. Degree in Electrical Engineering from University of Hong Kong in 1978, his M.S. Degrees in Electrical Engineering and Computer Science from Pennsylvania State University in 1983 and 1985 respectively, and his Ph.D. Degree in Electrical Engineering from Stanford University in 1992. Prior to joining Intel, he was a member of technical staff at Hewlett-Packard Labs from 1991 to 1993, where he participated in the architecture definition studies and the corresponding advanced compiler design and prototyping for the SuperWorkstation project whose architecture later evolved into the Intel-HP IA64 architecture. From 1994 to 1999, he was an assistant professor in Computer Science at the Hong Kong University of Science and Technology, where he taught compilers, computer architectures and operating systems, and led his students to develop a real-time multimedia operating system and a real-time parallel video server system. His current research interests include speculative thread-level parallelization and optimization, speculation support in compilers, new computer architectures/systems, and run-time systems.