Architectural Exploration with Liberty

In conjunction with MICRO-34

Austin, Texas

December 1, 2001

Today, architectural and microarchitectural design is often an art form requiring the expertise of a few key designers. The high cost of design evaluation prevents teams from considering many significant variations. Accordingly, the resulting designs are often sub-optimal. In order to enable systematic design space exploration, designers need tools which can evaluate a large number of proposed designs without delaying product delivery. For evaluations to be meaningful, the framework must provide retargetable software transformation tools that can make best use of architectural features and retargetable simulation tools to measure their effects. Conventional, manually retargeted compilers and simulators are simply not powerful enough to enable rapid exploration of a significant portion of the design space without delaying product delivery.

This tutorial describes the design and use of the Liberty Simulation Environment (LSE), which provides the retargetable simulation tools needed for design space exploration. The Liberty simulator constructor, part of the LSE, takes a designer's (micro)architectural description and constructs an efficient simulator for the described machine. The description is far easier to write than a custom simulator, enabling rapid evaluation of many designs. The LSE is also flexible enough to model both general purpose (x86, Alpha, IA-64) and application specific (PowerNP, IXP1200) (micro)architectures, giving designers freedom to explore a wider variety of possible architectures.

Using static instantiation techniques analogous to those used in object oriented language implementations, the constructor "writes" customized C-code simulators. The code customization and compiled-code techniques employed yield a significant improvement in overall simulated instructions per unit time. The user also has direct control over simulation speed versus accuracy trade-offs. The user can monitor any aspect of simulation via event code instantiation, giving compiler writers and architects the power to collect ad hoc statistics, as well as to drive visualization, debugging, and other tools. Further, the simulator description is designed to facilitate documentation and description generation tools.

Since configuration and instantiation of an IA-64 cycle-accurate simulator serves as a primary illustrative example, participants in this tutorial may also be interested in Intel's Open Research Compiler (ORC) tutorial. Together, Liberty and ORC provide a complete framework upon which to perform EPIC research.

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