TUTORIAL/WORKSHOP SCHEDULE

All Workshops and Tutorials will occur in the Westin 9th floor meeting area.

General schedule (individual exceptions are noted below):

8:00-8:30 am: Breakfast

Morning Session: 8:30 am-12:00 pm
    10-10:30 am: Coffee break

Lunch: 12:00-1:30 pm

Afternoon: 1:30-5:30 pm
    3-3:30 pm: Coffee Break

Meeting room Pearl Plymouth Palace New Amsterdam
Saturday
December 12
Morning Network on Chip Architectures (NoCArc)
(8:45 am-5:40 pm)
Workshop on Binary Instrumentation Systems and Applications
(8 am-12 pm)
The PARSEC Benchmark Suite Tutorial Tutorial: SimFlex and ProtoFlex: Fast, Accurate, and Flexible Simulation of Computer Systems
(lunch: 12-1 pm,
ends at 5 pm)
Afternoon Tutorial on Building Dynamic Instrumentation Tools with DynamoRIO Tutorial: Archer -- Deploying Zero-configuration Virtual Appliances for Architecture Simulation
(1-5 pm)
Sunday
December 13
Morning Workshop on New Directions in Computer Architecture Workshop on Photonic Interconnects & Computer Architecture (PICA)
(ends at 12:30)
Tutorial on GPGPU-Sim: A Performance Simulator for Massively Multithreaded Processor Research  
Afternoon   Tutorial: Integrated Multi-core Modeling
(ends at 6 pm)
Workshop on Computer Architecture Education
(ends at 5 pm)