Real-time 3D graphics algorithms are computationally demanding but highly parallelizable. These two attributes combined with ongoing mass-market demand for higher fidelity 3D graphics have led system designers to include specialized 3D graphics hardware in most modern PCs and in many cell phones and PDA's. These graphics processors have as many transistors in them as the CPU, but devote a much higher fraction of their transistors to ALU's.

Over the past few years 3D graphics hardware has added support for user programmability so that it is now reasonable to consider graphics processors to be the first widely deployed highly-parallel single chip programmable processors. Nevertheless, graphics architectures are in most respects still heavily specialized for graphics computations. A recurring theme of this tutorial will be that graphics architectures are best studied along with the 3D graphics algorithms that they support, because both the algorithms and architectures rapidly co-evolve as performance constraints change.

* Basic 3D graphics concepts and algorithms
* The standard 3D graphics hardware pipeline (Z-buffer pipeline)
* Case study of a modern 3D graphics architecture
* Comparison of CPU architectures, graphics architectures, and other parallel architectures
* Likely future directions for real-time 3D graphics hardware and algorithms